\doxysubsubsubsection{RCCEx SPDIFRX Clock Source }
\hypertarget{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source}{}\label{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source}\index{RCCEx SPDIFRX Clock Source@{RCCEx SPDIFRX Clock Source}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\Hypertarget{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_ga17e49b2294631b11bce86f698e359484}\label{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_ga17e49b2294631b11bce86f698e359484} 
\#define {\bfseries RCC\+\_\+\+SPDIFRXCLKSOURCE\+\_\+\+PLL}~(0x00000000U)
\item 
\Hypertarget{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_ga7d55b4b50c422af002ac3080469986a4}\label{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_ga7d55b4b50c422af002ac3080469986a4} 
\#define {\bfseries RCC\+\_\+\+SPDIFRXCLKSOURCE\+\_\+\+PLL2}~RCC\+\_\+\+CDCCIP1\+R\+\_\+\+SPDIFSEL\+\_\+0
\item 
\Hypertarget{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_gacb3279fa03f70c59133e7c10da4f2ee8}\label{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_gacb3279fa03f70c59133e7c10da4f2ee8} 
\#define {\bfseries RCC\+\_\+\+SPDIFRXCLKSOURCE\+\_\+\+PLL3}~RCC\+\_\+\+CDCCIP1\+R\+\_\+\+SPDIFSEL\+\_\+1
\item 
\Hypertarget{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_ga28acdd60100e01c45556d8a5903736c5}\label{group___r_c_c_ex___s_p_d_i_f_r_x___clock___source_ga28acdd60100e01c45556d8a5903736c5} 
\#define {\bfseries RCC\+\_\+\+SPDIFRXCLKSOURCE\+\_\+\+HSI}~RCC\+\_\+\+CDCCIP1\+R\+\_\+\+SPDIFSEL
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}
